MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 176

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Power Management
8-12
1
2
3
4
Programmable Interrupt Timers
BDM
JTAG
“Program” Indicates that the peripheral function during the low-power mode is dependent on programmable bits in the
peripheral register map.
These modules can generate a interrupt which will exit a low-power mode. The CPU will begin to service the interrupt
exception after wakeup.
These modules can generate a reset which will exit any low-power mode.
The BDM logic is clocked by a separate TCLK clock. Entering halt mode via the BDM port exits any low-power mode.
Upon exit from halt mode, the previous low-power mode will be re-entered and changes made in halt mode will remain
in effect.
Table 8-5. CPU and Peripherals in Low-Power Modes (Continued)
Module
MCF5271 Reference Manual, Rev. 2
Enabled
Enabled
Enabled
Wait Mode
Yes
Yes
Peripheral Status
No
2
4
Program
Enabled
Enabled
Doze Mode
1
/ Wakeup Capability
Yes
Yes
No
2
4
Stopped
Enabled
Enabled
Freescale Semiconductor
Stop Mode
Yes
No
No
4