MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 540

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

IEEE 1149.1 Test Access Port (JTAG)
29.1.2 Features
The basic features of the JTAG module are the following:
29-2
• Performs boundary-scan operations to test circuit board electrical continuity
• Bypasses instruction to reduce the shift register path to a single cell
• Sets chip output pins to safety states while executing the bypass instruction
• Samples the system pins during operation and transparently shift out the result
• Selects between JTAG TAP controller and Background Debug Module (BDM) using a
TRST/DSCLK
TMS/BKPT
JTAG_EN
dedicated JTAG_EN pin
TDI/DSI
TCLK
JTAG Module
31
4
-BIT BOUNDARY SCAN REGISTER
5-BIT TAP INSTRUCTION REGISTER
5-BIT TAP INSTRUCTION DECODER
1-BIT BYPASS REGISTER
1-BIT TEST_CTRL REGISTER
32-BIT IDCODE REGISTER
Figure 29-1. JTAG Block Diagram
TAP CONTROLLER
MCF5271 Reference Manual, Rev. 2
to Debug Module
Disable DSCLK
Force BKPT = 1
0
0
0
DSI
= 0
DSO
DSI
DSCLK
BKPT
Freescale Semiconductor
0
1
1
0
TDO/DSO