MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 530

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Symmetric Key Hardware Accelerator (SKHA)
28.2.1.6 SKHA Error Status Mask Register (SKESMR)
The SKESMR (located at address IPSBAR + 0x1B_0014) allows the user to mask off any of the
SKHA Error bits and not generate an interrupt. If the error occurs while the corresponding bit is
set then the error will be set in the SKESR but the interrupt will not be generated. Additional errors
will be flagged in the SKESR until an unmasked error is generated.
28-12
31–11
Bits
10
9
8
7
6
5
4
3
2
1
0
RMDP
Name
NEOF
NEIF
KRE
KPE
ERE
KSE
DSE
OFU
IME
IFO
—
Reserved
Key read error. An illegal attempt to read the key registers during processing has been
detected.
0 No error
1 Key read error occurred
Key parity error. Indicates if a DES key parity error has occurred. Key parity checking can
be disabled by setting the SKMR[DKP] bit (See
(SKMR).”).
0 No error
1 Key parity error occurred
Early read.
0 No error
1 A context register was read from while the module was busy processing data.
Register modified during processing
0 No error
1 A register was modified during processing
Key size Error
0 No error
1 Illegal key size was written into the SKHA key size register
Data size error
0 No error
1 Illegal data size was written into the SKHA data size register
Illegal mode error.
0 No error
1 Illegal mode specified
Non-empty output FIFO upon start.
0 No error
1 Output FIFO contains data upon start of processing
Non-empty input FIFO upon done.
0 No error
1 Input FIFO contained data when processing was complete
Output FIFO underflow
0 No error
1 Output FIFO was read while empty
Input FIFO overflow.
0 No error
1 Input FIFO has been written to while full
Table 28-6. SKESR Field Descriptions
MCF5271 Reference Manual, Rev. 2
Bit Description
Section 28.2.1.1, “SKHA Mode Register
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