MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 497

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
Bits
4-3
8
7
6
5
2
1
0
PDATA
SWAP
Name
OPAD
IPAD
MAC
ALG
INIT
—
Table 26-2. MDMR Field Descriptions (Continued)
Swap message digest. For SHA-1 only. Swap the output direction of the Message Digest
data. The data registers are reversed and byte swapped. This allows for viewing data in
the reverse order which might be used by other algorithms. See the table below for an
example.
0 Do not perform swap.
1 Swap output direction.
Outer padding of message. Exlusive OR the message with 0x5C5C_5C5C. Hash used
with HMAC. Requires key to be loaded into the FIFO
0 Do not perform padding
1 Perform padding
Inner padding of message. Exclusive OR the message with 0x3636_3636. Hash used with
HMAC. Requires key to be loaded into the FIFO
0 Do not perform padding
1 Perform padding
Initialization. Performs algorithm specific initialization of the digest registers. Most
operation will require this bit to be set. Only static operations that are continuing from a
known intermediate hash value should clear this bit.
0 Do not perform initialization
1 Initialize the selected algorithm’s starting registers
Message authentication code. Performs message authentication on messages. Requires
keys loaded into the context and key registers.
00 Do not perform MAC
01 Perform HMAC
10 Perform EHMAC
11 Reserved
Pad data bit. Performs automatic message padding on the current partial message block.
0 Do not perform padding
1 Perform padding
Reserved, should be cleared.
Algorithm. Selects which algorithm the MDHA module uses
0 Secure Hash Algorithm (SHA-1)
1 Message Digest 5 (MD5)
Algorithm
SHA-1
MCF5271 Reference Manual, Rev. 2
Message
Register
Digest
C0
D0
A0
B0
E0
D
H
P
L
T
SWAP = 0
Description
C
G
O
K
S
B
N
R
F
J
M
Q
A
E
I
M
Q
E
A
I
Memory Map/Register Definition
SWAP = 1
R
N
B
J
F
O
G
C
S
K
P
H
D
T
L
26-5