MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 276

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

DMA Controller Module
14-12
18–17
15–12
11–8
Bits
16
7
6
D_REQ
START
DMOD
DSIZE
SMOD
Name
—
Table 14-4. DCRn Field Descriptions (Continued)
Destination size. Determines the data size of the destination bus cycle for the DMA
controller.
00 Longword
01 Byte
10 Word
11 Line (16-byte burst)
Start transfer.
0 DMA inactive
1 The DMA begins the transfer in accordance to the values in the control registers. START
Source address modulo. Defines the size of the source data circular buffer used by the
DMA Controller. If enabled (SMOD is non-zero), the buffer base address will be located
on a boundary of the buffer size. The value of this boundary is based upon the initial
source address (SAR).
Destination address modulo. Defines the size of the destination data circular buffer used
by the DMA Controller. If enabled (DMOD value is non-zero), the buffer base address will
be located on a boundary of the buffer size. The value of this boundary depends on the
initial destination address (DAR).
Disable request. DMA hardware automatically clears the corresponding DCRn[EEXT] bit
when the byte count register reaches zero.
0 EEXT bit is not affected.
1 EEXT bit is cleared when the BCR is exhausted.
Reserved, should be cleared.
.
is cleared automatically after one system clock and is always read as logic 0.
MCF5271 Reference Manual, Rev. 2
SMOD
SMOD
DMOD
0000
0000
0001
0001
0010
0010
1111
1111
0000
0001
0010
1111
...
...
...
Description
Circular Buffer Size
Circular Buffer Size
Circular Buffer Size
Buffer Disabled
Buffer Disabled
Buffer Disabled
256 Kbytes
256 Kbytes
256 Kbytes
16 Bytes
16 Bytes
32 Bytes
32 Bytes
16 Bytes
32 Bytes
...
...
...
Freescale Semiconductor