MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 562

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Debug Support
30.4.5 Data Breakpoint/Mask Registers (DBR, DBMR)
The DBR, shown in
mode. DBR bits are masked by setting corresponding DBMR bits, as defined in TDR. DBR is
accessible in supervisor mode as debug control register 0x0E, using the WDEBUG instruction and
through the BDM port using the
supervisor mode as debug control register 0x0F, using the WDEBUG instruction and via the BDM
port using the
The DBR supports both aligned and misaligned references.
between processor address, access size, and location within the 32-bit data bus.
30-12
DRc[4:0]
Reset
Reset
31–0
31–0
Bits
Bits
W
W
R
R
—
—
31
15
WDMREG
Figure 30-8. Data Breakpoint/Mask Registers (DBR/DBMR)
Name
Name
Mask
Data
—
—
30
14
Figure
29
—
13
—
command.
Data breakpoint value. Contains the value to be compared with the data value from the
processor’s local bus as a breakpoint trigger.
Data breakpoint mask. The 32-bit mask for the data breakpoint trigger. Clearing a DBR bit
allows the corresponding DBR bit to be compared to the appropriate bit of the processor’s
local data bus. Setting a DBMR bit causes that bit to be ignored.
—
—
Table 30-11. DBMR Field Descriptions
28
12
30-8, specifies data patterns used as part of the trigger into debug
Table 30-10. DBR Field Descriptions
27
—
—
11
MCF5271 Reference Manual, Rev. 2
RDMREG
—
—
26
10
Data (DBR); Mask (DBMR)
Data (DBR); Mask (DBMR)
0x0E (DBR), 0x0F (DBMR)
—
—
25
9
and
—
—
24
8
WDMREG
—
—
23
Description
Description
7
—
—
22
6
commands. DBMR is accessible in
Table 30-12
—
—
21
5
20
—
—
4
—
—
19
3
shows relationships
Freescale Semiconductor
18
—
—
2
—
—
17
1
—
—
16
0