MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 147

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

7.4
This subsection provides a functional description of the clock module.
7.4.1
The system clock source is determined during reset
the CLKMOD signals are latched during reset and are of no importance after reset is negated. If
CLKMOD1 or CLKMOD0 is changed during a reset other than power-on reset, the internal clocks
may glitch as the system clock source is changed between external clock mode and PLL clock
mode. Whenever CLKMOD1 or CLKMOD0 is changed in reset, an immediate loss-of-lock
condition occurs.
Table 7-8
system clock modes. Refer to
Freescale Semiconductor
Bits
1
0
Functional Description
System Clock Modes
shows the clock-out frequency to clock-in frequency relationships for the possible
CALDONE Calibration complete. This bit indicates whether the calibration sequence has been
CALPASS
PLLMODE:PLLSEL:PLLREF
Name
Table 7-6. SYNSR Field Descriptions (Continued)
completed since the last time frequency modulation was enabled. If CALDONE = 0, the
calibration sequence is either in progress or modulation is disabled. If CALDONE=1 then
the calibration sequence has been completed, and frequency modulation is operating.
0 Calibration not complete
1 Calibration complete
Calibration passed. The CALPASS bit tells whether the calibration routine was successful.
When the calibration routine is initiated, CALPASS is set and remains set until either
modulation is disabled (by clearing the DEPTH bits in the SYNCR) or a failure occurs within
the frequency modulation calibration sequence.
0 Calibration unsuccessful
1 Calibration successful
000
100
110
111
Section 7.1.3, “Modes of Operation,”
Table 7-7. System Clock Modes
MCF5271 Reference Manual, Rev. 2
External clock mode (bypass PLL)
1:1 PLL mode
Normal PLL mode with external clock reference
Normal PLL mode with crystal reference
CALPASS CALDONE
0
1
(seeTable 7-3
Description
1
1
Clock Mode
unsuccessful
successful
and
for details on each mode.
Table
9-11). The values of
Functional Description
7-13