MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 1054

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Universal Serial Bus Interface
16.7.2
The dTD describes to the device controller the location and quantity of data to be sent/received for given
transfer. The DCD should not attempt to modify any field in an active dTD except the Next Link Pointer,
which should only be modified as described in section Managing Transfers with Transfer Descriptors.
16-126
DWord
1
31–5
31
Bits
4–1
Device controller read/write; all others read-only.
00
1
2
0
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Next transfer element pointer. This field contains the physical memory address of the next dTD to be processed. The
field corresponds to memory address signals [31:5], respectively.
Reserved, should be cleared. Bits reserved for future use and should be cleared.
Terminate (T). 1=pointer is invalid. 0=Pointer is valid (points to a valid Transfer Element Descriptor). This bit indicates
to the Device Controller that there are no more valid entries in the queue.
31–0
31–0
Bits
Endpoint Transfer Descriptor (dTD)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Setup Buffer 0. This buffer contains bytes 3 to 0 of an incoming setup buffer packet and is written by the device
controller to be read by software.
Setup Buffer 1. This buffer contains bytes 7 to 4 of an incoming setup buffer packet and is written by the device
controller to be read by software.
Buffer Pointer (Page 0)
Buffer Pointer (Page 1)
Buffer Pointer (Page 2)
Buffer Pointer (Page 3)
Buffer Pointer (Page 4)
Total Bytes
Figure 16-62. Endpoint Transfer Descriptor (dTD)
1
Next Link Pointer
Table 16-77. Multiple Mode Control
Table 16-78. Next dTD Pointer
ioc
15
Description
14 13 12 11 10
Description
000
MultO
0
9
00
8
0000_0000_0000
0000_0000_0000
0000_0000_0000
Current Offset
Frame Number
7
6
5
Status
Freescale Semiconductor
4
1
0000
3
1
1
2
1
T 0x00
0
0x0C
0x04
0x08
0x10
0x14
0x18
offset