MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 187

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

4.3.2.2.8
The LALE reset configuration word field, shown in
LALE signal. Refer to the hardware specifications for specific timing information.
4.3.3
The device loads the reset configuration words from a local bus EEPROM, a local bus NAND Flash, or an
I
described in
options.
4.3.3.1
The reset configuration words are assumed to reside in an EEPROM or NOR Flash or NAND Flash device
connected to LCS0 of the device local bus. Because the port size of this EEPROM is unknown, the device
reads all configuration words byte-by-byte only from locations that are independent of port size.
Table 4-20
that do not appear in this table have no effect on the configuration of the device. The values of the bytes
in
Table 4-21
(RCWL and RCWH).
Freescale Semiconductor
2
Reset Configuration
Word High Register
C serial EEPROM, or uses hard-coded configuration, as selected by the reset configuration inputs
.
.
Table 4-20
Reset Configuration Word
(RCWHR) Bit
29
shows addresses that should be used to contain the reset configuration words. Byte addresses
shows the data structure of the local bus device containing the reset configuration words
Loading the Reset Configuration Words
High
Low
Section 4.3.1, “Reset Configuration Signals.”
Loading from Local Bus
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
are always read on byte lane LAD[0:7] regardless of the port size.
EEPROM Address
LALE Configuration
0x0C
0x00
0x04
0x08
Table 4-21. Local Bus Reset Configuration Words Data Structure
Field Name
Table 4-20. Local Bus Configuration EEPROM Addresses
LALE
Bits [0:7] Address
0x00
0x20
RCWL[8:15]
RCWL[0:7]
Table 4-19. LALE Configuration
(Binary)
[0:7]
Value
0
1
Normal LALE timing
LALE is negated 1/2 a LBC_controller_clk earlier
Bits [8:15] Address Bits [16:23] Address Bits [24:31] Address
Table
[8:15]
0x08
0x28
EEPROM Data Bits
4-19, configures the timing of the local bus
The following sections describe each of these
[16:23]
Meaning
0x10
0x30
Reset, Clocking, and Initialization
[24:31]
0x18
0x38
4-21