MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 385

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Table 8-28
8.5.19
SCVCR, shown in
interrupt (CINT) source of the highest priority level.
Note that in core-disabled mode the user should use SIVCR only to read an updated interrupt vector
(SCVCR should not be used).
Table 8-29
8.5.20
SMVCR, shown in
management interrupt (SMI) source of the highest priority level.
Freescale Semiconductor
0–31
Offset 0x60
Reset
Bits Name
25–31 CVEC Critical interrupt vector. Specifies a 7-bit unique number of the IPIC’s highest priority critical interrupt source,
6–24
Bits
0–5
W
R
INT n Each implemented bit, listed in
0
CVECx Backward (MPC8260) compatible critical interrupt vector. Specifies a 6-bit unique number of the IPIC’s
Name
—
defines the bit fields of SERFR.
defines SCVCR bit fields.
System Critical Interrupt Vector Register (SCVCR)
System Management Interrupt Vector Register (SMVCR)
setting the SERFR bit.
SERFR bit positions are not affected by their relative priority.
Attempts to write to unimplemented (reserved) bits are ignored; read = 0
CVECx
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
highest priority critical interrupt source, pending to the core. When a critical interrupt request occurs, SCVCR
can be read. If there are multiple critical interrupt sources, SCVCR latches the highest priority critical
interrupt. Note that CVECx field will correctly reflect only first 64 interrupt vectors (See
The value of SCVEC cannot change while it is being read.
Write ignored, read = 0
pending to the core. When a critical interrupt request occurs, SCVCR can be read. If there are multiple critical
interrupt sources, SCVCR latches the highest priority critical interrupt. Note that CVEC field correctly reflects
all of the interrupt vectors (See
The value of SCVEC cannot change while it is being read.
Figure
Figure
Figure 8-23. System Critical Interrupt Vector Register (SCVCR)
5
6
8-23, contains a 7-bit code
8-24, contains a 7-bit code
Table 8-29. SCVCR Field Descriptions
Table 8-28. SERFR Field Descriptions
Table
Table 8-6
8-21, corresponds to an external MCP source. The user forces an MCP by
for details).
All zeros
—
Description
(Table
(Table
Description
8-29) representing the unmasked critical
8-30) representing the unmasked system
Integrated Programmable Interrupt Controller (IPIC)
24 25
Table 8-6
Access: Read only
CVEC
for details).
8-27
31