MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 793

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

15.5.3.5.9
MIIMCON, shown in
Table 15-48
15.5.3.5.10 MII Management Status Register (MIIMSTAT)
The MIIMSTAT register is read only by the user.
register.
Table 15-49
Freescale Semiconductor
16–31
16–31
0–15
0–15
Bits
Bits
O
Offset eTSEC1:0x2_452C
Reset
Offset eTSEC1:0x2_4530
Reset
W
W
R
R
PHY Control If written, an MII Mgmt write cycle is performed using this 16-bit data, the pre-configured PHY address
PHY Status Following an MII Mgmt read cycle, the 16-bit data can be read from this location. Its default value is
0
0
Name
Name
—
describes the fields of the MIIMCON register.
describes the fields of the MIIMSTAT register.
—
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
MII Management Control Register (MIIMCON)
Reserved
0x0000.
Reserved
(at MIIMADD[PHY Address]) and the register address (at MIIMADD[Register Address]). Its default
value is 0x0000.
Figure
Figure 15-44. MII Mgmt Control Register Definition
15-44, is written by the user.
Figure 15-45. MIIMSTAT Register Definition
—
—
Table 15-49. MIIMSTAT Field Descriptions
Table 15-48. MIIMCON Field Descriptions
Figure 15-45
All zeros
All zeros
15 16
15 16
Description
Description
describes the definition for the MIIMSTAT
Enhanced Three-Speed Ethernet Controllers
PHY Control
PHY Status
Access: Read only
Access: WO
15-75
31
31