MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 32

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Paragraph
Number
16.6.12.3.3
16.6.12.3.4
16.6.12.3.5
16.6.12.3.6
16.6.12.3.7
16.6.13
16.6.14
16.6.14.1
16.6.14.1.1
16.6.14.1.2
16.6.14.1.3
16.6.14.1.4
16.6.14.1.5
16.6.14.2
16.6.14.2.1
16.6.14.2.2
16.6.14.2.3
16.6.14.2.4
16.7
16.7.1
16.7.1.1
16.7.1.2
16.7.1.3
16.7.1.4
16.7.2
16.8
16.8.1
16.8.2
16.8.2.1
16.8.2.2
16.8.2.2.1
16.8.2.2.2
16.8.2.2.3
16.8.3
16.8.3.1
16.8.3.1.1
16.8.3.2
16.8.3.2.1
16.8.3.2.2
16.8.3.3
16.8.3.3.1
xxxii
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Device Data Structures .............................................................................................. 16-122
Device Operational Model......................................................................................... 16-128
Port Test Modes ..................................................................................................... 16-117
Interrupts................................................................................................................ 16-118
Endpoint Queue Head............................................................................................ 16-123
Endpoint Transfer Descriptor (dTD) ..................................................................... 16-126
Device Controller Initialization ............................................................................. 16-128
Port State and Control............................................................................................ 16-129
Managing Endpoints .............................................................................................. 16-132
Transfer/Transaction Based Interrupts............................................................... 16-119
Host Controller Event Interrupts ....................................................................... 16-121
Endpoint Capabilities/Characteristics................................................................ 16-124
Transfer Overlay ................................................................................................ 16-125
Current dTD Pointer .......................................................................................... 16-125
Setup Buffer....................................................................................................... 16-125
Bus Reset ........................................................................................................... 16-131
Suspend/Resume................................................................................................ 16-132
Endpoint Initialization ....................................................................................... 16-133
Data Toggle........................................................................................................ 16-134
Device Operational Model For Packet Transfers .............................................. 16-135
Split Transaction Execution State Machine for Isochronous......................... 16-110
Periodic Isochronous—Do-Start-Split........................................................... 16-110
Periodic Isochronous—Do Complete Split ................................................... 16-112
Complete-Split for Scheduling Boundary Cases 2a, 2b ................................ 16-115
Split Transaction for Isochronous—Processing Example ............................. 16-116
Transaction Error ........................................................................................... 16-119
Serial Bus Babble .......................................................................................... 16-119
Data Buffer Error ........................................................................................... 16-120
USB Interrupt (Interrupt on Completion (IOC)) ........................................... 16-121
Short Packet ................................................................................................... 16-121
Port Change Events ....................................................................................... 16-121
Frame List Rollover....................................................................................... 16-121
Interrupt on Async Advance.......................................................................... 16-121
Host System Error ......................................................................................... 16-122
Suspend Description ...................................................................................... 16-132
Suspend Operational Model .......................................................................... 16-132
Resume .......................................................................................................... 16-132
Stalling ........................................................................................................... 16-133
Data Toggle Reset.......................................................................................... 16-134
Data Toggle Inhibit ........................................................................................ 16-134
Priming Transmit Endpoints.......................................................................... 16-135
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