MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 653

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MPC8313CZQADDC

Manufacturer Part Number
MPC8313CZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313CZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

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The header dword specifies the security operation to be performed, the execution unit(s) needed, and the
modes for each execution unit. The pointer dwords, all of which have the same format, contain pointer and
length information for locating input or output data parcels (such as keys, context, or text-data). The large
number of pointers provided in the descriptor allows for multi-algorithm operations that require fetching
of multiple keys, as well as fetch and return of contexts. Any pointer dword that is not needed can be given
a length of zero, and the channel will skip over the corresponding operations.
SEC descriptors include scatter/gather capability, which means that each pointer in a descriptor can be
either a direct pointer to a contiguous parcel of data, or can be a pointer to a link table, which is a list of
pointers and lengths used to assemble the data parcel. When a link table is used to read input data, this is
referred to as a ‘gather’ operation; when used to write output data, it is referred to as a ‘scatter’ operation.
14.3.2
Descriptors are created by the host to guide the SEC through required cryptographic operations. The
header dword defines the operations to be performed, the mode for each operation, and internal addressing
used by the controller and channel for internal data movement. The fields that must be supplied to the SEC
are shown in the ‘Field’ rows of
the host to create proper headers for each cryptographic operation.
In processing a descriptor, the SEC can also write back certain fields to the header dword. These are shown
in the ‘Writeback’ rows of
Freescale Semiconductor
Pointer Dword 0
Pointer Dword 1
Pointer Dword 2
Pointer Dword 3
Pointer Dword 4
Pointer Dword 5
Pointer Dword 6
Header Dword
Descriptor Format: Header Dword
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
0
Length0
Length1
Length2
Length3
Length4
Length5
Length6
Figure
15 16 17
Figure 14-3. Descriptor Format
Figure
Header
14-4, and described in
J0 Extent0
J1 Extent1
J2 Extent2
J3 Extent3
J4 Extent4
J5 Extent5
J6 Extent6
14-4, and described in
23 24
31
Table
32
Table
14-5.
14-4. The SEC device drivers allow
Reserved
Pointer0
Pointer1
Pointer2
Pointer3
Pointer4
Pointer5
Pointer6
Security Engine (SEC) 2.2
63
14-11

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