MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 1143

Manufacturer Part Number

MPC8313CZQADDC

Microprocessors - MPU 8313 REV2.2 PB NO EN EXT

Manufacturer

Freescale Semiconductor

Processor Series

Data Bus Width

Maximum Clock Frequency

Program Memory Size

Data Ram Size

Interface Type

Mounting Style

Package / Case

Number Of Programmable I/os

Number Of Timers

Manufacturer

BOSTOCK HK LIMITED

Part Number:

MPC8313CZQADDC

Manufacturer:

Freescale Semiconductor

(SPMODE[CP] = 0).

(SPMODE[CP] = 1).

The SPI event register (SPIE) generates interrupts and reports events recognized by the SPI. When an

event is recognized, the SPI sets the corresponding SPIE bit. Most SPIE bits can be cleared by writing a

‘1’. Writing ‘0’ has no effect. Setting a bit in the SPI mask register (SPIM) enables, and clearing a bit

masks the corresponding interrupt. Unmasked SPIE bits must be cleared before the core clears internal

interrupt requests.

Freescale Semiconductor

(From Master)

NOTE: Q = Undefined signal.

(From Slave)

NOTE: Q = Undefined signal.

shows the SPI transfer format in which SPICLK starts toggling at the beginning of the transfer

shows the SPI transfer format in which SPICLK starts toggling in the middle of the transfer

SPI Event Register (SPIE)

MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2

Figure 19-5. SPI Transfer Format with SPMODE[CP] = 0

Figure 19-6. SPI Transfer Format with SPMODE[CP] = 1

shows SPI event register.

Serial Peripheral Interface