MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 1155

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

21.3.1
The GPIO direction registers (GPDIR), shown in
Table 21-3
21.3.2
The GPIO open drain register (GPODR), shown in
their output.
Table 21-4
Freescale Semiconductor
0–31
0–31
Bits
Bits
Offset 0xC00
Reset
Offset 0xC04
Reset
W
W
R
R
Name
Name
0
0
D n
D n
defines the bit fields of GPDIR.
defines the bit fields of GPODR.
GPIO Direction Register (GPDIR)
GPIO Open Drain Register (GPODR)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Direction. Indicates whether a signal is used as an input or an output.
0 The corresponding signal is an input.
1 The corresponding signal is an output.
Open-drain configuration. Indicates whether a signal is actively driven as an output or an open-drain driver.
This register has no effect on signals programmed as inputs in the corresponding GPDIR.
0 The I/O signal is actively driven as an output.
1 The I/O signal is an open-drain driver. As an output, the signal is driven active-low, otherwise it is
three-stated.
Figure 21-3. GPIO Open Drain Register (GPODR)
Figure 21-2. GPIO Direction Register (GPDIR)
Table 21-4. GPODR Bit Settings
Table 21-3. GPDIR Bit Settings
Figure
Figure
All zeros
All zeros
Description
Description
D n
D n
21-2, defines the direction of the individual ports.
21-3, defines the way individual ports drive
General Purpose I/O (GPIO)
Access: Read/write
Access: Read/write
21-3
31
31