MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 623

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

13.3.3.27 PCI Power Management Register 0 (PCIPMR0)
The PCI power management register 0 (PCIPMR0), shown in
management policies to implement in the system.
Table 13-43
Freescale Semiconductor
Offset 0x80
Reset 0
Reset 0
31–27
24–22
W
W
Bits
R
R
26
25
21
20
31
15
1
0
PME_Support
describes the PCIPMR0 fields.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
PME_Support
1
0
Aux_Current
D2_Support
D1_Support
Name
1
0
DSI
—
Figure 13-45. PCI Power Management Register 0 (PCIPMR0)
27
1
0
NEXT_CAP_PTR
D2_Support D1_Support
Indicates the power states in which the PCI Controller may assert PME#.
PME_Support (bit 27):
0 PME# cannot be asserted from D0
1 PME# can be asserted from D0
PME_Support (bit 28):
0 PME# cannot be asserted from D1
1 PME# can be asserted from D1
PME_Support (bit 29):
0 PME# cannot be asserted from D2
1 PME# can be asserted from D2
PME_Support (bit 30):
0 PME# cannot be asserted from D3_hot
1 PME# can be asserted from D3_hot
PME_Support (bit 31):
0 PME# cannot be asserted from D3_cold
1 PME# can be asserted from D3_cold
D2 power management state support
0 The PCI controller does not support D2 power management state.
1 The PCI controller supports the D2 power management state.
D1 power management state support
0 The PCI controller does not support D1 power management state.
1 The PCI controller supports the D1 power management state.
Reports the 3.3 Vaux auxiliary current requirements
Device specific initialization. Indicates whether special initialization of this PCI controller is
required.
Reserved
Table 13-43. PCIPMR0 Field Descriptions
26
1
0
25
1
0
Aux_Current
24
0
0
8
0
0
7
Figure
Description
22
0
0
DSI — PME_Clock
21
1
0
13-45, indicates the power
20
0
0
CAP_ID
19
1
0
18
Access: Read only
0
0
PCI Bus Interface
Version
1
0
13-41
16
1
1
0