MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 260

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

System Configuration
5.7.3.4
Each timer has a 16-bit field in GTCPR, used to latch the value of the counter when a defined transition of
TINx is sensed by the corresponding input capture edge detector.
5.7.4
This section provides an overview and detailed descriptions of the GTM signals.
There are four distinct external input timer capture signals (TIN1, TIN2, TIN3, and TIN4), four distinct
external input timer get signals (TGATE1, TGATE2, TGATE3, and TGATE4), and four distinct external
timer output signals (TOUT1, TOUT2, TOUT3, and TOUT4). The GTM interface signals are defined in
Table
5-52
TGATE1
TGATE2
TGATE3
TGATE4
•
•
TOUT1
TOUT2
TOUT3
TOUT4
Name
TIN1
TIN2
TIN3
TIN4
5-54.
Normal gate mode enables the count on a falling edge of the TGATE pin and disables the count on
the rising edge of TGATE. This mode allows the timer to count conditionally, based on the state of
TGATE.
The restart gate mode performs the same function as normal mode, except it also resets the counter
on the falling edge of the TGATE pin. This mode has applications in pulse interval measurement
and bus monitoring.
GTM External Signal Description
Capture Modes
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
TGATE1
TGATE2
TGATE3
TGATE4
TOUT1
TOUT2
TOUT3
TOUT4
TIN1
TIN2
TIN3
TIN4
Port
Global timer 1 capture control signal
Global timer 2 capture control signal
Global timer 3 capture control signal
Global timer 4 capture control signal
Global timer 1 counter gate control signal
Global timer 2 counter gate control signal
Global timer 3 counter gate control signal
Global timer 4 counter gate control signal
Global timer 1 counter output signal
Global timer 2 counter output signal
Global timer 3 counter output signal
Global timer 4 counter output signal
Table 5-54. GTM Signal Properties
Function
I/O
O
O
O
O
I
I
I
I
I
I
I
I
Freescale Semiconductor
Reset
0
0
0
0
0
0
0
0
1
1
1
1
Require
Pull Up
No
No
No
No
No
No
No
No
No
No
No
No