MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 682

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Security Engine (SEC) 2.2
14.4.2.13 MDEU FIFOs
MDEU uses a private input FIFO to hold data to be hashed. The input FIFO is multiply addressable, but
those multiple addresses point only to the write (push) end of the FIFO. A write to anywhere in the MDEU
FIFO address space causes the 64-bit-words to be pushed onto the MDEU input FIFO, and a read from
anywhere in the MDEU FIFO address space returns all zeros.
14.4.3
This section contains details about the advanced encryption standard execution unit (AESU), including
modes of operation, status and control registers, and FIFOs.
Most of the registers described here would not normally be accessed by the host. They are documented
here mainly for debug purposes. In typical operation, the AESU is used through channel-controlled access,
which means that most reads and writes of AESU registers are directed by the SEC channel. Driver
software would perform host-controlled register accesses only on a few registers for initial configuration
and error handling.
14.4.3.1
The AESU mode register (AESUMR), shown in
AESU.
AESUMR is cleared when the AESU is reset or re-initialized. Setting a reserved mode bit will generate a
data error. If the mode register is modified during processing, a context error will be generated.
14-40
Reset
Field
Addr
R/W
0
Advanced Encryption Standard Execution Unit (AESU)
AESU Mode Register (AESUMR)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
SHA-1, SHA-224, and SHA-256 are big endian. MD5 is little endian. The
MDEU module internally reverses the endianness of the key upon writing
to or reading from the MDEU key registers if the MDEU mode register
(MDEUMR) indicates that MD5 is the hash of choice.
SHA-1, SHA-224, and SHA-256 are big endian. MD5 is little endian. The
MDEU module internally reverses the endianness of the key upon writing
to or reading from the MDEU key registers if the MDEU mode register
(MDEUMR) indicates that MD5 is the hash of choice.
—
Figure 14-26. AESU Mode Register (AESUMR)
50
51
SCM
53
Figure
AESU 0x3_4000
NOTE
NOTE
54
R/W
—
0
14-26, contains 7 bits that are used to program the
55
56
ECM
57
FM
58
IM
59
RDK
60
Freescale Semiconductor
61
CM
62
ED
63