MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 607

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MPC8313CZQADDC

Manufacturer Part Number
MPC8313CZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313CZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

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13.3.3
This section describes the PCI configuration space registers. These registers are shown with descending
bit numbering to correspond to the PCI standard.
Table 13-22
fields are common to registers in both spaces to ensure consistency. These fields are discussed in the
register definitions.
Freescale Semiconductor
12–15
16–19
20–25
26–31
3–11
Bits
2
PCI Configuration Space Registers
shows the PCI configuration registers that are mapped in PCI configuration space. Some
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Name
WTT
RTT
IWS
The registers described in this section use little-endian byte ordering.
Software running on the local processor in big-endian mode must byte-swap
the data. No byte swapping occurs when the registers are accessed from the
PCI bus.
PF
Prefetchable. Defines whether the transactions that are translated through this window are
prefetchable on the local bus. Streaming the transactions requires the memory space to be
prefetchable.
0 Not prefetchable
1 Prefetchable
Reserved
Read transaction type. Determines the type of transaction performed on the local bus when the PCI
transaction is a read. The RTT values are described as follows:
0100 Read without snoop on system bus
0101 Read with snoop on system bus
Others reserved
Write transaction type. Determines the type of transaction performed on the local bus when the PCI
transaction is a write. The WTT values are described as follows:
0100 Write without snoop of local processor
0101 Write with snoop of local processor
Others reserved
Reserved
Inbound window size. Indicates the size of the inbound translation window. Inbound translation
window size N which is the encoded 2^(N+1) bytes window size. The smallest window is 4 Kbytes (N
= 11)
000000–001010 Reserved
001011
001100
...
011110
011111–111111 Reserved
Table 13-21. PIWAR n Field Descriptions (continued)
4-Kbyte window size
8-Kbyte window size
2-Gbyte window size
NOTE
Description
PCI Bus Interface
13-25

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