MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 505

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

10.4.3
The FCM provides a glueless interface to parallel-bus NAND Flash EEPROM devices. The FCM contains
three basic configuration register groups—BR
Figure 10-44
in FCM mode. Commands, address bytes, and data are all transferred on LAD[0:7]
for transfers written to the device, or LFRE asserted for transfers read from the device. eLBC signals
LFCLE and LFALE determine whether writes are of type command (only LFCLE asserted), address (only
LFALE asserted), or write data (neither LFCLE nor LFALE asserted). The NAND Flash RDY/BSY pin is
normally open-drain, and should be pulled high by a 4.7-KΩ resistor. On system reset, a global (boot)
chip-select is available that provides a boot ROM chip-select (LCS0) prior to the system being fully
configured.
1. Note bit numbering reversal: LAD[0] (msb) connects to Flash IO[7], while LAD[7] (lsb) connects to IO[0].
Freescale Semiconductor
Table 10-34. Boot Bank Field Values after Reset for GPCM as Boot Controller (continued)
Flash Control Machine (FCM)
shows a simple connection between an 8-bit port size NAND Flash EEPROM and the eLBC
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Register
OR0
BCTLD
CSNT
XACS
EHTR
TRLX
SETA
Field
ACS
SCY
EAD
AM
n
, OR
n
0000_0000_0000_0000_0
, and FMR.
Setting
1111
11
0
1
1
0
1
1
1
Enhanced Local Bus Controller
1
, with LFWE asserted
10-57