MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 231

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

22–27 Reserved
28–29 ETSEC1
30–31 ETSEC2
5.3.2.6
The system I/O configuration register high, shown in
the device I/O pins. Each bit or set of bits in this register select which function is used by a certain group
of the device pins. The reset value of this register depends on TSEC1M and TSEC2M fields setting in the
reset configuration word high. This is used to avoid contention in systems not using TBI or RTBI modes.
In these systems, the device pins are not driven during and after reset. The function of these pins can be
changed by writing to this register during system initialization. The reset value of TSOBI1 and TSOBI2
also depends on the TSEC1M and TSEC2M fields settings in the reset configuration word high in order to
select the correct output buffer impedance for full or reduced TSEC pin mode.
Freescale Semiconductor
Bits
SICRL[Bits]
Value
Group
_A
_A
System I/O Configuration Register High (SICRH)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
TSEC1_TX_EN
TSEC1_TX_ER
TSEC2_RXD3
TSEC2_RXD2
TSEC2_RXD1
TSEC2_RXD0
TSEC2_TX_EN
TSEC2_TX_ER
Pin Function 0
0b0/0b00
—
Table 5-28. SICRL Bit Settings (continued)
Pin Function 1
0b1/0b01
—
—
—
—
—
—
—
—
—
Figure
TSEC_1588_ALARM1
TSEC_1588_ALARM2
5-15, controls the multiplexing of the rest of
Pin Function 2
0b10
—
—
—
—
—
—
—
GPIO[20]
GPIO[21]
GPIO[22]
GPIO[23]
GPIO[26]
GPIO[27]
Pin Function 3
0b11
—
—
—
System Configuration
00 RTBI
11 Else
Reset
Value
00
0
5-23