MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 954

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MPC8313CZQADDC

Manufacturer Part Number
MPC8313CZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313CZQADDC

Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4

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Universal Serial Bus Interface
16.3.2.13 Configure Flag Register (CONFIGFLAG)
This EHCI register is not used in this implementation. A read from this register returns a constant of a
0x0000_0001 to indicate that all port routings default to this host controller.
16.3.2.14 Port Status and Control Register (PORTSC)
The port status and control (PORTSC) register is only reset when power is initially applied or in response
to a controller reset. The initial conditions of a port are:
If the port has port power control, this state remaivPns until software applies power to the port by setting
port power to one.
In device mode, the USB DR controller does not support power control. Port control in device mode is
only used for status port reset, suspend, and current connect status. It is also used to initiate test mode or
force signaling and allows software to put the PHY into low power suspend mode and disable the PHY
clock.
16-26
Offset 0x2_3180
Reset 0
31–1
Bits
0
W
R
Offset 0x2_3184
Reset 0
Reset
31
No device connected
Port disabled
Name
W
W
R
R
0
CF
31
15
0
PTS
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
PIC
Reserved.
Configure flag. Always 1 indicating all port routings default to this host.
0
30
14
0
0
PO
29
13
0
0
0
Table 16-22. CONFIGFLAG Register Field Descriptions
PP
Figure 16-19. Configure Flag Register (CONFIGFLAG)
28
12
1
0
Figure 16-20. Port Status and Control (PORTSC)
0
27
11
0
PSPD
LS
0
0
26
10
0
0
25
0
0
9
0
PFSC PHCD WKOC WKDS WLCN
PR
24
0
0
8
0
All zeros
SUSP
Description
23
0
0
7
0
FPR
22
0
0
6
0
OCC
w1c
0
21
0
5
0
OCA
0
20
0
4
0
PEC
w1c
0
19
0
3
Freescale Semiconductor
0
0
PE
0
2
Access: Read only
PTC
0
Access: Mixed
CSC
w1c
0
0
1
0
CCS
0
1
16
0
0
CF
1
0

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