MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 367

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

8.5.2
SIVCR, shown in
source (INT) of the highest priority level.
Table 8-5
Table 8-6
Freescale Semiconductor
Offset 0x04
Reset
25–31 IVEC Regular interrupt vector. Specifies a 7-bit unique number of the IPIC’s highest priority regular interrupt source,
6–24
Bits
0–5
W
R
0
IVECx Backward (MPC8260) compatible regular interrupt vector. Specifies a 6-bit unique number of the IPIC’s highest
Name
Interrupt ID Number
—
defines the bit fields of SIVCR.
shows the definition of IVEC.
System Global Interrupt Vector Register (SIVCR)
IVECx
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
priority regular interrupt source, pending to the core. When a regular interrupt request occurs, SIVCR can be
read. If there are multiple regular interrupt sources, SIVCR latches the highest priority regular interrupt. Note
that IVECx field correctly reflects only the first 64 interrupt vectors (See
The value of SIVEC cannot change while it is being read.
Write ignored, read = 0
pending to the core. Note that the when a regular interrupt request occurs, SIVCR can be read. If there are
multiple regular interrupt sources, SIVCR latches the highest priority regular interrupt. Note that the IVEC field
correctly reflects all interrupt vectors (see
The value of SIVCR cannot change while it is being read.
Note that in core disabled mode the user should use SIVCR only in order to
read an updated interrupt vector (SCVCR and SMVCR should not be used).
1–8
10
11
12
13
0
9
Figure
5
Figure 8-3. System Global Interrupt Vector Register (SIVCR)
8-3, contains a 7-bit code
6
Table 8-6. IVEC/CVEC/MVEC Field Definition
Table 8-5. SIVCR Field Descriptions
eTSEC1 1588 timer
eTSEC2 1588 timer
Interrupt Meaning
Error (no interrupt)
Reserved
UART1
UART2
SEC
Table 8-6
NOTE
(Table
All zeros
—
Description
for details).
8-5) representing the regular unmasked interrupt
Integrated Programmable Interrupt Controller (IPIC)
0b000_0001–0b000_1000
Table 8-6
Interrupt Vector
0b000_0000
0b000_1001
0b000_1010
0b000_1011
0b000_1100
0b000_1101
24 25
for details).
Access: Read only
IVEC
8-9
31