MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 444

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

DDR Memory Controller
9.6.1
Depending on the memory type used, certain fields must be programmed differently.
the differences in certain fields for different memory types. Note that this table does not list all fields that
must be programmed.
9-50
DDR_SDRAM_CLK_CNTL Clock adjust
DDR_SDRAM_INTERVAL Interval configuration
DDR_SDRAM_MODE_2
ODT_WR_CFG
ODT_PD_EXIT
ODT_RD_CFG
PRETOACT
Parameter
DDR_INIT_ADDR
DDR_DATA_INIT
AP n _EN
Table 9-34. Memory Interface Configuration Register Initialization Parameters (continued)
Name
Programming Differences Between Memory Types
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Chip Select n Auto
Precharge Enable
Chip Select ODT Read
Configuration
Chip Select ODT Write
Configuration
ODT Powerdown Exit
Precharge to Activate
Timing
Table 9-35. Programming Differences Between Memory Types
Description
Mode configuration
Data initialization configuration
register
Initialization address
Description
DDR1
DDR2
DDR1
DDR2
DDR1
DDR2
DDR2
DDR1
DDR2
DDR1
Can be used to place chip select n in auto
precharge mode
Can be used to place chip select n in auto
precharge mode
Should always be set to 000
could be set differently depending on system
topology. However, systems with only 1 chip select
typically not uses ODT when issuing reads to the
memory.
Should always be set to 000
could be set differently depending on system
topology. However, ODT typically is set to assert
for the chip select that is getting written to (value
would be set to 001).
Should be set according to the DDR2
specifications for the memory used. The JEDEC
parameter this applies to is t
the memory used (t
the memory used (t
Can be enabled to assert ODT if desired. This
Can be enabled to assert ODT if desired. This
Should be set to 0001
Should be set according to the specifications for
Should be set according to the specifications for
Differences
RP
RP
CLK_ADJUST
ESDMODE2
ESDMODE3
INIT_VALUE
)
)
INIT_ADDR
Parameter
BSTOPRE
REFINT
AXPD
.
Table 9-35
Freescale Semiconductor
Section/Page
Section/Page
9.4.1.10/9-23
9.4.1.12/9-26
9.4.1.13/9-27
9.4.1.14/9-27
9.4.1.15/9-28
9.4.1.2/9-10
9.4.1.2/9-10
9.4.1.2/9-10
9.4.1.4/9-12
9.4.1.5/9-14
illustrates