HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 124
HD6417615
Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6417615.pdf
(873 pages)
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Pin Configuration: Table 3.1 lists the functions relating to the pins relating to the oscillator
circuit.
Table 3.1
Pin Name
CKIO
XTAL
EXTAL
CAP1
CAP2
MD0
MD1
MD2
CKPREQ/CKM
PLL Circuit 1: PLL circuit 1 eliminates phase differences between external clocks and clocks
supplied internally within the chip. In high-speed operation, the phase difference between the
reference clocks and operating clocks in the chip directly affects the interface margin with
peripheral devices On-chip PLL circuit 1 is provided to eliminate this effect.
PLL Circuit 2: PLL circuit 2 either leaves unchanged, doubles, or quadruples the frequency of
clocks provided from the crystal resonator or the EXTAL pin external clock input for the chip
operating frequency The frequency modification register sets the clock frequency multiplication
factor.
106
Pin Configuration
I/O
I/O
O
I
I
I
I
I
I
I
Function
External clock input pin or internal clock output pin
Connects to the crystal resonator
Connects to the crystal resonator or to the external clock input when
using PLL circuit 2
Connects to capacitance for operating PLL circuit 1
Connects to capacitance for operating PLL circuit 2
The level applied to these pins specifies the clock mode
Used as the clock pause request pin, or specifies operation of the crystal
resonator
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