HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 708

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Output Compare Output Timing: A compare match signal is generated in the final state in
which TCNT and TGR match (the point at which the count value matched by TCNT is updated).
When a compare match signal is generated, the output value set in TIOR is output at the output
compare output pin (TIOC pin). After a match between TCNT and TGR, the compare match
signal is not generated until the TCNT input clock is generated.
Figure 16.32 shows output compare output timing.
Input Capture Signal Timing: Figure 16.33 shows input capture signal timing.
696
P
TCNT
input clock
TCNT
TGR
Compare
match signal
TIOC pin
P
Input capture
input
Input capture
signal
TCNT
TGR
Figure 16.33 Input Capture Input Signal Timing
Figure 16.32 Output Compare Output Timing
N
N
N
N+1
N
N+1
N+2
N+2

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