HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 265

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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7. If CPU and DMAC bus cycles are set as break conditions when an execution-times break has
8. UBC and H-UDI are used by the emulator. For this reason, the operation of UBC and H-UDI
been set, BETR will only be decremented once even if CPU and DMAC condition matches
occur simultaneously.
may differ in some cases between the emulator and the actual device. If UBC and H-UDI are
not used on the user’s system, no register setting should be performed.
247

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