HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 191

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

5.3.18
Vector number setting register L (VCRL) is a 16-bit read/write register that sets the serial
communication interface with FIFO 1 (SCIF1) receive-error interrupt and receive-data-full/data-
ready interrupt vector numbers (0–127).
VCRL is initialized to H'0000 by a reset. It is not initialized in standby mode.
Bits 15 and 7—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 14 to 8—Serial Communication Interface with FIFO 1 (SCIF1) Receive-Error Interrupt
Vector Number 6 to 0 (SER1V6–SER1V0): These bits set the vector number for the serial
communication interface with FIFO 1 (SCIF1) receive-error interrupt. There are seven bits, so the
value can be set between 0 and 127.
Bits 6 to 0—Serial Communication Interface with FIFO 1 (SCIF1) Receive-Data-Full/Data-Ready
Interrupt Vector Number 6 to 0 (SRX1V6–SRX1V0): These bits set the vector number for the
serial communication interface with FIFO 1 (SCIF1) receive-data-full/data-ready interrupt. There
are seven bits, so the value can be set between 0 and 127.
Initial value:
Initial value:
Vector Number Setting Register L (VCRL)
R/W:
R/W:
Bit:
Bit:
15
—
—
0
R
7
0
R
SER1V6 SER1V5 SER1V4 SER1V3 SER1V2 SER1V1 SER1V0
SRX1V6 SRX1V5 SRX1V4 SRX1V3 SRX1V2 SRX1V1 SRX1V0
R/W
R/W
14
0
6
0
R/W
R/W
13
0
5
0
R/W
R/W
12
0
4
0
R/W
R/W
11
0
3
0
R/W
R/W
10
0
2
0
R/W
R/W
9
0
1
0
R/W
R/W
8
0
0
0
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