HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 727

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

TDO in the IDCODE mode. All registers, except SDBPR, SDBSR, and SDIDR, can be accessed
from the CPU.
Table 17.3 shows the kinds of serial transfer possible with each register.
Table 17.3 H-UDI Register Serial Transfer
Register
SDIR
SDSR
SDDRH
SDDRL
SDBPR
SDBSR
SDIDR
17.2
17.2.1
The test clock pin (TCK) provides an independent clock supply to the H-UDI. As the clock input
to TCK is supplied directly to the H-UDI, a clock waveform with a duty cycle close to 50% should
be input (for details, see section 23, Electrical Characteristics). If no clock is input, TCK is fixed at
1 by internal pull-up.
17.2.2
The test mode select pin (TMS) is sampled on the rise of TCK. TMS controls the internal state of
the TAP controller. If no signal is input, TMS is fixed at 1 by internal pull-up.
17.2.3
The test data input pin (TDI) performs serial input of instructions and data for H-UDI registers.
TDI is sampled on the rise of TCK. If no signal is input, TDI is fixed at 1 by internal pull-up.
17.2.4
The test data output pin (TDO) performs serial output of instructions and data from H-UDI
registers. Transfer is performed in synchronization with TCK. If there is no output, TDO goes to
the high-impedance state.
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External Signals
Test Clock (TCK)
Test Mode Select (TMS)
Test Data Input (TDI)
Test Data Output (TDO)
Serial Input
Possible
Impossible
Possible
Possible
Possible
Possible
Impossible
Serial Output
Possible
Possible
Possible
Possible
Possible
Possible
Possible