HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 596

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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In asynchronous mode, the SCIF performs synchronization at the falling edge of the start bit in
reception. The SCIF samples the data on the eighth (fourth, second) pulse of a clock with a
frequency of 16 (8, 4) times the length of one bit, so that the transfer data is latched at the center of
each bit.
Transmit/Receive Format: Table 14.10 shows the transmit/receive formats that can be used in
asynchronous mode. Any of 12 transmit/receive formats can be selected by means of settings in
the serial mode register (SCSMR).
Serial
data
1
Start
1 bit
bit
0
(Example with 8-Bit Data, Parity, Two Stop Bits, LSB-First Transfer)
(LSB)
Figure 14.3 Data Format in Asynchronous Communication
D0
D1
One unit of transfer data (character or frame)
D2
Transmit/receive data
7 or 8 bits
D3
D4
D5
D6
(MSB)
D7
or none
Parity
1 bit,
0/1
bit
Idle state (mark state)
1
bit(s)
2 bits
Stop
1 or
1
1
583

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