HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 75

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Each of the address pointers has an index register. The R8 register becomes the index register (Ix)
of the X memory address register (Ax), and the R9 register becomes the index register (Iy) of the
Y memory address register (Ay).
The X, Y data transfer instructions are processed in word lengths. X, Y data memory is accessed
in 16 bit lengths. This is why the increment processing adds 2 to the address registers. In order to
decrement, set –2 in the index register and designate add index register addressing. During X, Y
data addressing, only bits 1 to 15 of the address pointer are valid. Always write a 0 to bit 0 of the
address pointer and the index register during X, Y data addressing.
Figure 2.9 shows the X, Y data transfer addressing. When X memory and Y memory are accessed
using the X, Y bus, the upper word of Ax (R4 or R5) and Ay (R6 or R7) is ignored. The result of
@Ay+ and @Ay+Iy is stored in the lower word of Ay, and the upper word retains its original
value.
+2 (INC)
+0 (No update)
Notes:
All three addressing methods (increment, index register addition (Ix, Iy), and
no update) are post-updating methods. To decrement the address pointer, set
the index register to –2 or –4.
1. Adder added for DSP addressing.
R8[Ix]
Figure 2.9 X, Y Data Transfer Addressing
ALU
R4[Ax]
R5[Ax]
+2 (INC)
+0 (No update)
R9[Iy]
AU*
1
R6[Ay]
R7[Ay]
57

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