HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 70

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

2.4
2.4.1
The addressing modes and effective address calculation for instructions executed by the CPU core
are listed in table 2.12.
Table 2.12 CPU Instruction Addressing Modes and Effective Addresses
Addressing
Mode
Direct register
addressing
Indirect register
addressing
Post-increment
indirect register
addressing
Pre-decrement
indirect register
addressing
52
Instruction Formats
CPU Instruction Addressing Modes
Instruction
Format
Rn
@Rn
@Rn+
@–Rn
Effective Addresses Calculation
The effective address is register Rn
(The operand is the contents of register Rn)
The effective address is the content of register
Rn
The effective address is the content of register
Rn. A constant is added to the content of Rn after
the instruction is executed. 1 is added for a byte
operation, 2 for a word operation, and 4 for a
longword operation
The effective address is the value obtained by
subtracting a constant from Rn. 1 is subtracted
for a byte operation, 2 for a word operation, and
4 for a longword operation
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn – 1/2/4
+
–
Rn – 1/2/4
Rn
Rn
Equation
—
Rn
Rn
(After the
instruction
executes)
Byte: Rn + 1
Word: Rn + 2
Longword: Rn + 4
Byte: Rn – 1
Word: Rn – 2
Longword: Rn – 4
executed with Rn
after calculation)
Rn
Rn (Instruction
Rn
Rn
Rn
Rn