HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 231

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

BDRC Configuration
XYEC = 0
XYEC = 1
6.2.10
BDMRCH
BDMRCL
Break data mask register C (BDMRC) consists of two 16-bit readable/writable registers: break
data mask register CH (BDMRCH) and break data mask register CL (BDMRCL). BDMRCH
specifies which bits of the break data set in BDRCH are to be masked, and BDMRCL specifies
which bits of the break data set in BDRCL are to be masked. Operation also depends on bits
Initial value:
Initial value:
Initial value:
Initial value:
Break Data Mask Register C (BDMRC)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
Data
X data
(when XYSC = 0)
Y data
(when XYSC = 1)
BDMC31 BDMC30 BDMC29 BDMC28 BDMC27 BDMC26 BDMC25 BDMC24
BDMC23 BDMC22 BDMC21 BDMC20 BDMC19 BDMC18 BDMC17 BDMC16
BDMC15 BDMC14 BDMC13 BDMC12 BDMC11 BDMC10 BDMC9 BDMC8
BDMC7 BDMC6 BDMC5 BDMC4 BDMC3 BDMC2 BDMC1 BDMC0
R/W
R/W
R/W
R/W
15
15
0
7
0
0
7
0
R/W
R/W
R/W
R/W
14
14
0
6
0
0
6
0
Upper 16 Bits
(BDC31 to BDC16)
Upper 16 bits of data bus
X data
(XDB15 to XDB0)
—
R/W
R/W
R/W
R/W
13
13
0
5
0
0
5
0
R/W
R/W
R/W
R/W
12
12
0
4
0
0
4
0
R/W
R/W
R/W
R/W
11
11
0
3
0
0
3
0
Lower 16 Bits
(BDC15 to BDC0)
Lower 16 bits of data bus
—
Y data
(YDB15 to YDB0)
R/W
R/W
R/W
R/W
10
10
0
2
0
0
2
0
R/W
R/W
R/W
R/W
9
0
1
0
9
0
1
0
R/W
R/W
R/W
R/W
8
0
0
0
8
0
0
0
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