HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 406

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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9.2.13
IFLCR is a 16-bit counter that indicates the number of times transmission of a packet with a frame
length of less than four bytes was attempted during data transmission. When the value in this
register reaches H'FFFF (65,535), the count is halted. The counter value is cleared to 0 by a write
to this register (the write value is immaterial).
Bits 31 to 16—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 15 to 0—Illegal Frame Length Count 15 to 0 (IFLC15 to IFLC0): These bits indicate the
count of illegal frame length transmission attempts.
390
Initial value:
Initial value:
Initial value:
Illegal Frame Length Counter Register (IFLCR)
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
IFLC15
IFLC7
R/W
R/W
31
15
0
R
0
7
0
IFLC14
IFLC6
R/W
R/W
30
14
0
R
0
6
0
IFLC13
IFLC5
R/W
R/W
29
13
0
R
0
5
0
IFLC12
IFLC4
R/W
R/W
. . .
. . .
. . .
. . .
12
0
4
0
IFLC11
IFLC3
R/W
R/W
19
11
0
R
0
3
0
IFLC10
IFLC2
R/W
R/W
18
10
0
R
0
2
0
IFLC9
IFLC1
R/W
R/W
17
0
R
9
0
1
0
IFLC8
IFLC0
R/W
R/W
16
0
R
8
0
0
0

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