HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 303

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

For the CS0–CS3 spaces, CS, RD, and WEn are negated for one cycle after negation of the
external wait signal is accepted, as shown in figure 7.14. For the CS4 space, the number of cycles
before CS, RD, and WEn are negated after acceptance of external wait negation can be set as 1, 2,
or 4 by means of bits A4WD1 and A4WD0 in WCR2. Figure 7.15 shows an example.
286
Read
Write
Note: * DACKn waveform when active-low is specified.
CKIO
A24–A0
CSn
RD/WR
RD
D15–D0
D15–D0
WEn
WAIT
BS
DACKn*
Figure 7.15 Wait State Timing of Ordinary Space in CS4 Space
T1
Tw
Specified by A4WD1 and
A4WD0 in WCR2
(A4WD1, A4WD0 = 01)
Twx
Twx
T2