HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 601
HD6417615
Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6417615.pdf
(873 pages)
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1. When data is written to the transmit FIFO data register (SCFTDR), the SCIF transfers the data
2. When data is transferred from SCFTDR to SCTSR and transmission is started, transmit
3. The SCIF checks for transmit data in SCFTDR at the timing for sending the stop bit. If there is
588
In serial transmission, the SCIF operates as described below.
to the transmit shift register (SCTSR), and starts transmitting. Check that the TDFE flag is set
to 1 in the serial status 1 register (SC1SSR) before writing transmit data to SCFTDR. The
number of data bytes that can be written is at least {16 – (transmit trigger set number)}.
operations are performed continually until there is no transmit data left in SCFTDR. If the
number of data bytes in SCFTDR falls to or below the transmit trigger number set in the FIFO
control register (SCFCR) during transmission, the TDFE flag is set. If the TE bit setting in the
serial control register (SCSCR) is 1 at this time, a transmit-FIFO-data-empty interrupt (TXI) is
requested.
The serial transmit data is sent from the TxD pin in the following order.
a. Start bit: One 0-bit is output.
b. Transmit data: 8-bit or 7-bit data is output in LSB-first or MSB-first order according to the
c. Parity bit or multiprocessor bit: One parity bit (even or odd parity), or one multiprocessor
d. Stop bit(s): One or two 1-bits (stop bits) are output.
e. Mark state: 1 is output continuously until the start bit that starts the next transmission is
data in SCFTDR, it is transferred to SCTSR, the stop bit is sent, and then serial transmission of
the next frame is started.
If there is no transmit data in SCFTDR, the TEND flag is set to 1 in the serial status 1 register
(SC1SSR), the stop bit is sent, and then the line goes to the mark state in which 1 is output
continuously.
Figure 14.6 shows an example of the operation for transmission in asynchronous mode.
setting of the TLM bit in SC2SSR.
bit is output. (A format in which neither a parity bit nor a multiprocessor bit is output can
also be selected.)
sent.
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