HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 766

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

19.2.1
The port A register is shown in table 19.1.
Table 19.1 Register Configuration
Name
Port A data register
19.2.2
The port A data register (PADR) is a 16-bit read/write register that stores port A data. Bits 15, 14,
and 3 are reserved: they always read 0, and the write value should always be 0. Bits PA13DR to
PA0DR correspond to pins PA13 to PA0. When a pin functions as a general output, if a value is
written to PADR, that value is output directly from the pin, and if PADR is read, the register value
is returned directly regardless of the pin state. When a pin functions as a general input, if PADR is
read the pin state, not the register value, is returned directly. If a value is written to PADR,
although that value is written into PADR it does not affect the pin state. Table 19.2 summarizes
port A data register read/write operations.
PADR is initialized to H'0000 by a power-on reset. It is not initialized by a manual reset or in
standby mode or sleep mode.
756
Initial value:
Initial value:
Register Configuration
Port A Data Register (PADR)
R/W:
R/W:
Bit:
Bit:
PA7DR
R/W
15
—
0
R
7
0
Abbreviation
PADR
PA6DR PA5DR
R/W
14
—
0
R
6
0
PA13DR PA12DR PA11DR PA10DR PA9DR PA8DR
R/W
R/W
R/W
R/W
13
0
5
0
PA4DR
Initial Value
H'0000
R/W
R/W
12
0
4
0
R/W
11
—
0
3
0
R
Address
H'FFFFFC84
PA2DR
R/W
R/W
10
0
2
0
PA1DR PA0DR
R/W
R/W
9
0
1
0
Access Size
8, 16
R/W
R/W
8
0
0
0