HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 272

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

7.1.5
The address map, which has a memory space of 320 Mbytes, is divided into five spaces The types
and data width of devices that can be connected are specified for each space The overall space
address map is shown in table 7.3 Since the spaces of the cache area and the cache-through area
are actually the same, and the maximum memory space that can be connected is 160 Mbytes. This
means that when address H'20000000 is accessed in a program, the data accessed is actually in
H'00000000.
The chip has 16-kbyte RAM as on-chip memory. The on-chip RAM is divided into an X area and
a Y area, which can be accessed in parallel with the DSP instruction. See the SH-1/SH-2/SH-DSP
Programming Manual for more information.
There are several spaces for cache control. These include the associative purge space for cache
purges, address array read/write space for reading and writing addresses (address tags), and data
array read/write space for forced reads and writes of data arrays.
Table 7.3
Address
H'00000000–H'01FFFFFF
H'02000000–H'03FFFFFF
H'04000000–H'05FFFFFF
H'06000000–H'07FFFFFF
H'08000000–H'09FFFFFF
H'0A000000–H'0FFFFFFF Reserved
H'10000000–H'1000DFFF
H'1000E000–H'1000EFFF
H'1000F000–H'1001DFFF
H'1001E000–H'1001EFFF
H'1001F000–H'1FFFFFFF
H'20000000–H'21FFFFFF
H'22000000–H'23FFFFFF
Address Map
Address Map
Space
CS0 space, cache area
CS1 space, cache area
CS2 space, cache area
CS3 space, cache area
CS4 space, cache area
Reserved
On-chip X RAM area
Reserved
On-chip Y RAM area
Reserved
CS0 space, cache-through
area
CS1 space, cache-through
area
Memory
Ordinary space or burst
ROM
Ordinary space
Ordinary space or
synchronous DRAM*
Ordinary space,
synchronous DRAM*
DRAM
Ordinary space (I/O
device)
Ordinary space or burst
ROM
Ordinary space
2
2
, or
Size
32 Mbytes
32 Mbytes
32 Mbytes
32 Mbytes
32 Mbytes
8 kbytes
8 kbytes
32 Mbytes
32 Mbytes
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