HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 870

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Pin Type
EtherC
I:
O: Output
H: High-level output
L: Low-level output
Z: High-impedance state
K: Input pins are in the high-impedance state; output pins maintain their previous state.
Notes: In sleep mode, if the DMAC is operating the address/data bus and bus control signals vary
862
Input
according to the operation of the DMAC. (The same applies when refreshing is performed.)
*
Pin Name
TXCLK
TXEN
TXER
ETXD–ETXD0
CRS
COL
MDC
MDIO
RXCLK
RXDV
RXER
ERXD–ERXD0
Depends on the clock mode (CKPREQN, MD2–MD0 setting).
Power-
On
Reset
I
O
O
O
I
I
O
IO
I
I
I
I
Bus
Acquired
I
O
O
O
I
I
O
IO
I
I
I
I
Manual Reset
Bus
Released
I
O
O
O
I
I
O
IO
I
I
I
I
Standby
Mode
(HIZ = 0)
I
O
O
O
I
I
O
IO
I
I
I
I
Pin State
Power-Down State
Standby
Mode
(HIZ = 1)
I
O
O
O
I
I
O
IO
I
I
I
I
Sleep
Mode
I
O
O
O
I
I
O
IO
I
I
I
I
Bus-
Released
State
I
O
O
O
I
I
O
IO
I
I
I
I

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