HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 726

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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17.1.3
Table 17.1 shows the H-UDI pin configuration.
Table 17.1 Pin Configuration
Pin Name
Test clock
Test mode select
Test data input
Test data output
Test reset
17.1.4
Table 17.2 shows the H-UDI registers.
Table 17.2 Register Configuration
Register
Instruction register
Status register
Data register H
Data register L
Bypass register
Boundary scan
register
ID code register
Notes: 1. Indicates whether the register can be read/written to by the CPU.
Instructions and data can be input to the instruction register (SDIR) and data register (SDDR) by
serial transfer from the test data input pin (TDI). Data from SDIR, the status register (SDSR), and
SDDR can be output via the test data output pin (TDO). The bypass register (SDBPR) is a 1-bit
register to which TDI and TDO are connected in bypass mode. The boundary scan register
(SDBSR) is a 330-bit register, and is connected to TDI and TDO in the SAMPLE/PRELOAD or
EXTEST mode. The ID code register (SDIDR) is a 32-bit register; a fixed code can be output via
2. Initial value when the TRST signal is input. Registers are not initialized by a reset
Pin Configuration
Register Configuration
(power-on or manual) or in standby mode.
Abbreviation
SDIR
SDSR
SDDRH
SDDRL
SDBPR
SDBSR
SDIDR
Abbreviation
TCK
TMS
TDI
TDO
TRST
R/W*
R
R/W
R/W
R/W
1
I/O
Input
Input
Input
Output
Input
Initial Value*
H'F000
H'0101
Undefined
Undefined
H'0001100F
Function
Test clock input
Test mode select input signal
Serial data input
Serial data output
Test reset input signal
2
Address
H'FFFFFCB0
H'FFFFFCB2
H'FFFFFCB4
H'FFFFFCB6
Access Size
(Bits)
8/16/32
8/16/32
8/16/32
8/16/32
715

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