HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 581

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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Asynchronous mode:
Synchronous mode:
Where B:
n
0
1
2
3
The bit rate error in asynchronous mode is found from the following equations:
568
N: SCBRR setting for baud rate generator (0
P : Peripheral module operating frequency (MHz)
n:
Error (%) =
Error (%) =
Error (%) =
N =
N =
N =
N =
Bit rate (bits/s)
Baud rate generator input clock (n = 0, 1, 2, or 3)
(See the table below for the relation between n and the clock.)
64
32
16
8
2
2
2
2
P
P
P
P
2n–1
2n–1
2n–1
2n–1
(N + 1)
(N + 1)
(N + 1)
Clock
P
P /4
P /16
P /64
B
B
B
B
P
P
P
B
B
B
10
10
10
10
6
6
6
6
(When operating on a base clock of 16 times the bit rate)
10
10
10
64
32
(When operating on a base clock of 8 times the bit rate)
16
(When operating on a base clock of 4 times the bit rate)
– 1 (When operating on a base clock of 16 times the bit rate)
– 1 (When operating on a base clock of 8 times the bit rate)
– 1 (When operating on a base clock of 4 times the bit rate)
– 1
6
6
6
2
2
2
2n–1
2n–1
2n–1
– 1
– 1
– 1
CKS1
0
1
100
100
100
N 255)
SCSMR Settings
CKS0
0
1
0
1

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