HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 609

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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596
Clear TDFE and TEND flags to 0
number)} bytes of transmit data
Write {16 – (transmit trigger set
to SCFTDR, and set MPBT
Clear TE bit to 0 in SCSCR,
Read TEND bit in SC2SSR
Read TDFE bit in SC1SSR
and set TxD pin as output
End of transmission?
Start of transmission
End of transmission
Figure 14.12 Sample Multiprocessor Serial Transmission Flowchart
Break output?
Clear DR to 0
port with PFC
Initialization
in SC2SSR
TEND = 1?
TDFE = 1?
Yes
Yes
Yes
Yes
4
3
No
No
No
No
1
2
1. PFC initialization: Set the TxD pin, and
2. SCIF status check and transmit data
3. Serial transmission continuation
4. Break output at the end of serial
In steps 2 and 3, the number of transmit
data bytes that can be written can be
ascertained from the number of transmit
data bytes in SCFTDR indicated in the
upper 8 bits of the FIFO data count register
(SCFDR).
the SCK pin if necessary, with the PFC.
write: Read the serial status 1 register
(SC1SSR) and check that the TDFE bit
is set to 1, then write transmit data to
the transmit FIFO data register
(SCFTDR). Set the MPBT bit to 0 or 1
in SC1SSR. Finally, clear the TDFE
and TEND flags to 0 after reading 1
from them.
The number of data bytes that can be
written is {16 – (transmit trigger set
number)}.
procedure: To continue serial
transmission, read 1 from the TDFE bit
to confirm that writing is possible, then
write data to SCFTDR, and then clear
the TDFE bit to 0. (Checking and
clearing of the TDFE bit is automatic
when the DMAC is activated by a
transmit-FIFO-data-empty interrupt
(TXI) request, and data is written to
SCFTDR.)
transmission: To output a break in
serial transmission, clear the port data
register (DR) to 0, then clear the TE bit
to 0 in SCSCR, and set the TxD pin as
an output port with the PFC.

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