HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 131

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

Bit 7—PLL2ST: Switching is possible in modes 0 to 3. In modes 4 to 6, PLL circuit 2 cannot be
used. In these modes, this bit always reads 1.
Bit 7: PLL2ST
0
1
Bit 6—PLL1ST: Switching is possible in modes 0, 1, 4, and 5. In modes 2, 3, and 6, PLL circuit 1
cannot be used. In these modes, this bit always reads 1.
Bit 6: PLL1ST
0
1
Bit 5—CKIOST: Setting is possible in modes 0 to 3. In modes 4 to 6, the CKIO pin is an input
pin. In these modes, this bit always reads 1.
Bit 5: CKIOST
0
1
Bit 4—Reserved: This bit is always read as 0. The write value should always be 0.
Bits 3 to 0—FR3 to FR0: The internal clock frequency and CKIO output frequency (modes 0–2)
can be set by frequency setting bits FR3–FR0. The values that can be set in bits FR3–FR0 depend
on the mode and whether PLL circuit 1 and PLL circuit 2 are operating or halted. The following
tables show the values that can be set in FR3–FR0, and the internal clock and CKIO output
frequency ratios, taking the external input clock frequency as 1.
Initial value:
R/W:
Bit:
PLL2ST
R/W
—
7
Description
PLL circuit 2 used
PLL circuit 2 not used
Description
PLL circuit 1 is used
PLL circuit 1 is not used
Description
The CKIO pin outputs E
The CKIO pin is in the high-impedance state (Do not place CKIO in the high-
impedance state when PLL circuit 1 is operating)
PLL1ST
R/W
—
6
CKIOST
R/W
—
5
—
R
4
0
FR3
R/W
3
0
FR2
R/W
—
2
FR1
R/W
—
1
FR0
R/W
0
0
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