HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 670

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

TIOR0L
Channel
0
Note: 1. When the BFA bit in TMDR0 is set to 1 and TGR0C is used as a buffer register, this
658
Bit 3:
IOC3
0
1
setting is invalid and input capture/output compare is not generated.
Bit 2:
IOC2
0
1
0
1
Bit 1:
IOC1
0
1
0
1
0
1
*
Bit 0:
IOC0 Description
0
1
0
1
0
1
0
1
0
1
*
*
TGR0C is Output disabled
output
compare
register*
TGR0C is Capture input
input
capture
register*
1
1
Initial output is 0
output
Output disabled
Initial output is 1
output
source is
TIOCC0 pin
Setting prohibited
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
(Initial value)
*: Don’t care