HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 401

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

9.2.8
The lower 16 bits of the 48-bit MAC address are set in MARL. The setting in this register is
normally made in the initialization process after a reset.
Note: The MAC address setting must not be changed while the transmitter and receiver are
Bits 31 to 16—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 15 to 0—MAC Address Bits 15 to 0 (MA15 to MA0): Used to set the lower 16 bits of the
MAC address.
Note: If the MAC address to be set in the SH7615 is 01-23-45-67-89-AB (hexadecimal), the
Initial value:
Initial value:
Initial value:
enabled. First return the EtherC and E-DMAC modules to their initial state by means of
the SWR bit in the E-DMAC mode register (EDMR), then make the new setting.
value set in this register is H'000089AB.
MAC Address Low Register (MALR)
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
MA15
MA7
R/W
R/W
31
—
15
0
R
0
7
0
MA14
MA6
R/W
R/W
30
—
14
0
R
0
6
0
MA13
MA5
R/W
R/W
29
—
13
0
R
0
5
0
MA12
MA4
R/W
R/W
. . .
. . .
. . .
12
0
4
0
MA11
MA3
R/W
R/W
19
—
11
0
R
0
3
0
MA10
MA2
R/W
R/W
18
—
10
0
R
0
2
0
MA9
MA1
R/W
R/W
17
—
0
R
9
0
1
0
MA8
MA0
R/W
R/W
16
—
0
R
8
0
0
0
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