HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 259

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

4. BRSR, BRDR, and BRFR have a four-queue structure. When the stored address is read in a PC
6.3.8
CPU Instruction Fetch Cycle Break Condition Settings
A. Register settings: BARA = H'00000404 / BAMRA = H'00000000 / BBRA = H'0054
B. Register settings: BARA = H'00027128 / BAMRA = H'00000000 / BBRA = H'005A
trace, the read is performed from the head of the queue. Reads should be performed in the
order BRFR, BRSR, BRDR. After BRDR is read, the queue shifts by one. Use longword
access to read BRSR and BRDR.
Set conditions:
A user break interrupt is generated after execution of the instruction at address H'00000404,
before execution of instructions at addresses H'00003080 to H'000030FF, after execution of
instructions at addresses H'00008010 to H'00008016, or before execution of the instruction at
address H'0000FF04.
Examples of Use
BARB = H'00003080 / BAMRB = H'0000007F / BBRB = H'0054
BARC = H'00008010 / BAMRC = H'00000006 / BBRC = H'0054
BDRC = H'00000000 / BDMRC = H'00000000
BARD =H'0000FF04 / BAMRD = H'00000000 / BBRD = H'0054
BDRD = H'00000000 / BDMRD = H'00000000
BRCR = H'04000400
All channels independent
Channel A: Address:
Channel B: Address:
Channel C: Address:
Channel D: Address:
BARB = H'00031415 / BAMRB = H'00000000 / BBRB = H'0054
BARC = H'00037226 / BAMRC = H'00000000 / BBRC = H'0056
Bus cycle: CPU, instruction fetch (post-execution),
Bus cycle: CPU, instruction fetch (pre-execution),
Data:
Bus cycle: CPU, instruction fetch (post-execution),
Data:
Bus cycle: CPU, instruction fetch (pre-execution),
H'00000404; address mask: H'00000000
read (operand size not included in conditions)
H'00003080; address mask: H'0000007F
read (operand size not included in conditions)
H'00008010; address mask: H'00000006
H'00000000; data mask: H'00000000
read (operand size not included in conditions)
H'0000FF04; address mask: H'00000000
H'00000000; data mask: H'00000000
read (operand size not included in conditions)
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