HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 532

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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12.2.7
TOCR is an 8-bit read/write register that selects the output level for output compare and controls
switching between access of output compare registers A and B. TOCR is initialized to H'E0 by a
reset, in standby mode, and when the module standby function is used.
Bits 7 to 5—Reserved: These bits are always read as 1. The write value should always be 1.
Bit 4—Output Compare Register Select (OCRS): OCRA and OCRB share the same address. The
OCRS bit controls which register is selected when reading/writing to this address. It does not
affect the operation of OCRA and OCRB.
Bit 4: OCRS
0
1
Bits 3 and 2—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 1—Output Level A (OLVLA): Selects the level output to the output compare A output pin
upon compare match A (signal indicating match of FRC and OCRA).
Bit 1: OLVLA
0
1
Bit 0—Output Level B (OLVLB): Selects the level output to the output compare B output pin
upon compare match B (signal indicating match of FRC and OCRB).
Bit 0: OLVLB
0
1
Initial value:
Timer Output Compare Control Register (TOCR)
R/W:
Bit:
7
1
R
Description
OCRA register selected
OCRB register selected
Description
0 output on compare match A
1 output on compare match A
Description
0 output on compare match B
1 output on compare match B
6
1
R
5
1
R
OCRS
R/W
4
0
3
0
R
2
0
R
OLVLA
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
OLVLB
R/W
0
0
517

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