HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 449

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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10.2.11 FIFO Depth Register (FDR)
FDR specifies the depth (size) of the transmit and receive FIFOs.
Bits 31 to 13—Reserved
Bits 12 to 8—Tx FIFO Depth (TFD): Specifies either 256 or 512 bytes as the depth (size) of the
transmit FIFO (which has a maximum capacity of 512 bytes). The setting cannot be changed after
transmission/reception has started.
Bit 12 to 8:
TFD
0
1
Bits 7 to 5—Reserved: These bits should only be written with 0.
434
Initial value:
Initial value:
Initial value:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Description
256 bytes
512 bytes
31
15
0
0
7
0
30
14
0
0
6
0
29
13
0
0
5
0
TFD
R/W
RFD
R/W
. . .
. . .
. . .
. . .
12
0
4
0
TFD
R/W
RFD
R/W
19
11
0
0
3
0
TFD
R/W
RFD
R/W
18
10
0
0
2
0
TFD
R/W
RFD
R/W
17
0
9
0
1
0
(Initial value)
TFD
R/W
RFD
R/W
16
0
8
0
0
0

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