HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 771

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

20.2
20.2.1
Standby control register 1 (SBYCR1) is an 8-bit read/write register that sets the power-down
mode. SBYCR is initialized to H'00 by a reset.
Bit 7—Standby (SBY): Specifies transition to standby mode. To enter the standby mode, halt the
WDT (set the TME bit in WTCSR to 0) and set the SBY bit.
Bit 7: SBY
0
1
Bit 6—Port High Impedance (HIZ): Selects whether output pins are set to high impedance or
retain the output state in standby mode. When HIZ = 0 (initial state), the specified pin retains its
output state. When HIZ = 1, the pin goes to the high-impedance state. See Appendix B.1, Pin
States during Resets, Power-Down States and Bus Release State, for which pins are controlled.
Bit 6: HIZ
0
1
Bit 5—Module Stop 5 (MSTP5): Specifies halting the clock supply to the user break controller
(UBC). When the MSTP5 bit is set to 1, the supply of the clock to the UBC is halted. When the
clock halts, the UBC registers retain their pre-halt state. Do not set this bit while the UBC is
running.
Bit 5: MSTP5
0
1
Initial value:
Register Descriptions
Standby Control Register 1 (SBYCR1)
R/W:
Bit:
Description
Executing a SLEEP instruction puts the chip into sleep mode
Executing a SLEEP instruction puts the chip into standby mode
Description
Pin state retained in standby mode
Pin goes to high impedance in standby mode
Description
UBC running
Clock supply to UBC halted
SBY
R/W
7
0
R/W
HIZ
6
0
MSTP5
(UBC)
R/W
5
0
(DMAC)
MSTP4 MSTP3
R/W
4
0
(DSP)
R/W
3
0
—
2
0
R
MSTP1
(FRT)
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
—
0
0
R
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