HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 638

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

15.1
A three-channel simple synchronous serial I/O is provided on-chip. The serial I/O functions
mainly as an interface between the chip and a codec or modem analog front-end.
15.1.1
The serial I/O has the following features:
Figure 15.1 shows a block diagram of the serial I/O.
Full-duplex operation
Independent transmit/receive registers and independent transmit/receive clocks
Double-buffered transmit/receive ports
Continuous data transmission/reception possible
Interval transfer mode and continuous transfer mode
Memory-mapped receive register, transmit register, control register, and status register
With the exception of SIRSR and SITSR, these registers are memory-mapped and can be
accessed by a MOV instruction.
Choice of 8- or 16-bit data length
Data transfer communication by means of polling or interrupts
Data transfer can be monitored by polling the receive data register full flag (RDRF) and
transmit data register empty flag (TDRE) in the serial status register. Interrupt requests can be
generated during data transfer by setting the receive interrupt request flag and transmit
interrupt request flag.
MSB-first transfer between SIO and data I/O
Overview
Features
Section 15 Serial I/O (SIO)
625